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With 193nm optical lithography being extended to 12nm design rules and beyond, quality and performance requirements for photomasks are becoming increasingly challenged to support the increased pattern complexity. Additionally, interactions between mask, the lithography process, and OPC (Optical Proximity Correction) are becoming a more critical tool in tolerance reduction. One of the tools being used to reduce this variation is Mask Process Correction (MPC). Model-based Mask Process Correction (MB-MPC) is one of the key tools used to improve photomask Critical Dimension (CD) uniformity and provide high fidelity, and increase patterning stability of resolution limited features, such as assist features (SRAFs) at today’s leading-edge nodes. Since 2017, participants in the eBeam Initiative Mask Maker Survey have reported that MPC is considered a requirement for 16nm and below. Reduction of systematic photomask CD errors with MPC enables improvement of the accuracy of Optical Proximity Correction models by reducing mismatch between actual and modelled masks. While model-based MPC has been demonstrated to reduce mask fidelity and dimensional errors to sub 1nm on mask, one of the downsides is that it is a slow and resource intensive solution. An advanced model based MPC requires massive numbers of CPUs and their associated EDA licenses. In this paper, we will teach a technique for mitigation by use of a Rule-Based MPC (RB-MPC) solution with MB-MPC accuracy to reduce Mask Data Prep (MDP) runtime with no loss in patterning quality. We report on a full cycle of model to rule-based MPC simplification approaches and verification. We will describe the process by which we have been able to migrate a model-based MPC (MB-MPC) solution to a more cost effective, and equally accurate Rule-based MPC (RB-MPC) solution. This will included the methodology for derivation, implementation, and verification of the modified RB-MPC, which is based on both mask, and wafer performance metrics, and characterization of limitations of this process, as the challenges in converting to a RB-MPC from a MBMPC solution by application, including technology, mask process, target layer, and wafer-performance metrics.
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