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Recently, the etch induced on-product overlay contribution as part of the total on-product overlay budget has received more attention. The main reason for this is that the etch induced overlay penalties are comparable to or even exceeding the state-of-the-art scanner overlay performance of approximately 1-nm. Large values from 4-nm to as much as 15-nm have been reported at the edge of the wafer. In order to mitigate these overlay penalties, solutions have been developed by both scanner and etch tool companies. Since the scanner has the capability to apply corrections per exposed field, the corrections can be optimized such that the overlay performance after etch is within the required specification. A potential drawback of this solution is that the underlying root cause is not taken away. A tilt in the etch direction that is causing the etch induced overlay penalty is compensated by a lateral offset by the scanner. A more elegant and preferred solution would be to optimize the etch tool hardware and/or etch recipe settings such that the etch direction is perpendicular to the wafer surface at every location on the wafer. To this end, dedicated hardware has been developed inside the etch chamber to compensate for the etch tilt in the etch direction at the wafer edge.
Etch induced overlay effects were more recently also observed within each individual exposure field. A clear correlation with the pattern density distribution was found. Since these overlay penalties are static and repetitive from field to field, etch tool hardware changes are likely not the way forward to eliminate these kinds of overlay errors. For non-uniform pattern density distributions, a deep understanding of the details of the etch mechanism in combination with an optimized etch recipe is currently being considered to eliminate the intra-field etch induced overlay contributions.
In earlier publications, the main focus was either on characterizing the etch impact on overlay or on understanding the impact of stressed layers on overlay. In this paper, we address the overlay impact after etching thin films that are deposited with either compressive or tensile stress. The deposition of the stressed films results in so-called umbrella- or bowl-shaped wafers. By varying the film thickness and composition, four different splits have been defined with warp levels of 40-μm and 80-μm for both shapes, respectively. First, the etch contribution for the different stressed layers is quantified. We will show that the etch induced overlay contribution does not depend on whether the stress in the deposited layer is compressive or tensile. This means that the etch induced overlay can be optimized independently of the properties of the stressed layer. Since the mask used has a non-uniform pattern density distribution, the stress distribution within the exposure field after the etching process will be non-uniform as well. This has a direct impact on the measured overlay after resist development for the subsequent litho layers. We will provide more clarity on the origin and nature of this overlay contributor.
The goal of this paper is to characterize and better understand the overlay contributors associated with stressed layer etch. Additionally, we will provide solution directions to mitigate these overlay penalties.
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