Paper
12 March 2021 A logarithmic response burst IRFPA ROIC with pixel level integration of memory
Author Affiliations +
Proceedings Volume 11763, Seventh Symposium on Novel Photoelectronic Detection Technology and Applications; 117639H (2021) https://doi.org/10.1117/12.2587713
Event: Seventh Symposium on Novel Photoelectronic Detection Technology and Application 2020, 2020, Kunming, China
Abstract
This paper presents a logarithmic response burst mode IRFPA ROIC with pixel level integration of BDI structure and memory cells. BDI structure provides stable bias for the detector, and converts detector current into logarithmic voltage fast. On-chip high speed video record is achieved by high speed sampling the logarithmic response voltage and storing it into the memory cells in order. A column level SAR ADC is used to convert the outputs of memory cells into digital code. The prototype chip with 64×64 pixels was designed and fabricated. Ultra-high speed video capturing at 1Mfps with 100 consecutive frames is successfully demonstrated.
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Jiqing Zhang, Wenbiao Mao, Shengyou Zhong, Zhihao Li, Nan Chen, and Libin Yao "A logarithmic response burst IRFPA ROIC with pixel level integration of memory", Proc. SPIE 11763, Seventh Symposium on Novel Photoelectronic Detection Technology and Applications, 117639H (12 March 2021); https://doi.org/10.1117/12.2587713
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