Paper
20 October 2022 A design of LVDS high-speed data transmission system based on FPGA
Jianhua Li, Wu Lan, Changjian Liu, Yi Hu, Bin You, Haochen Wu, Xiaoming Liao
Author Affiliations +
Proceedings Volume 12451, 5th International Conference on Computer Information Science and Application Technology (CISAT 2022); 124512Q (2022) https://doi.org/10.1117/12.2656550
Event: 5th International Conference on Computer Information Science and Application Technology (CISAT 2022), 2022, Chongqing, China
Abstract
In order to meet the requirements of mass data transmission between various communication systems today, this paper proposes a high-speed LVDS data transmission system based on FPGA, which uses a high-speed serial LVDS bus for communication. The transmission system makes full use of the advantages of LVDS, such as strong anti-interference ability, low power consumption, and fewer external cores. Combined with the characteristics of FPGA field programmability, it can transmit data efficiently in real time. According to the LVDS-related transmission characteristics, the LVDS-related transmission layer is built through FPGA, including the conversion of serial data and parallel data, the synchronization of clock and data, the framing and de-framing of transmission data, etc. detailed design. Finally, the loopback simulation test shows that the system has high transmission rate, stable and reliable operation, simple design and broad application prospects.
© (2022) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jianhua Li, Wu Lan, Changjian Liu, Yi Hu, Bin You, Haochen Wu, and Xiaoming Liao "A design of LVDS high-speed data transmission system based on FPGA", Proc. SPIE 12451, 5th International Conference on Computer Information Science and Application Technology (CISAT 2022), 124512Q (20 October 2022); https://doi.org/10.1117/12.2656550
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Data conversion

Clocks

Field programmable gate arrays

Receivers

Logic

Data transmission

Transmitters

RELATED CONTENT

Study of S G filter based real time OFDM PON...
Proceedings of SPIE (December 23 2013)
Design of UART interface based on FPGA
Proceedings of SPIE (March 28 2023)
High-speed ADC interface design based on JESD204B protocol
Proceedings of SPIE (December 21 2023)
GaAs 800-mb/s serial communications chip set
Proceedings of SPIE (October 01 1990)

Back to Top