Presentation + Paper
9 April 2024 Estimation of overlay error using in-line subsurface scanning probe microscopy
Dipankar Mukherjee, Hamed Sadeghian, Henk Nijmeijer
Author Affiliations +
Abstract
The overlay accuracy for current technology node of 3-D structures has to be precise down to a single-digit nanometer range. At those tiny dimensions, overlay errors can occur in the fabrication process ow, thereby impacting the chip yield and performance. With the current CMOS logic road-map, which involves multiple patterning, achieving more stringent overlay requirements becomes even more challenging. With multiple alignment layers it becomes difficult to have a reference metrology to estimate the error induced. Subsurface Scanning Probe Microscopy involving frequency-mixing scheme is a candidate that can cater to this need of reference metrology due to its ability to measure through several layers non-destructively. In this work, metrology investigation has been carried out on a wafer in which programmed overlay error has been introduced. SSPM is used to estimate the variation in overlay introduced, shedding light on achievable sensitivity and performance while scanning through different layers.
Conference Presentation
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Dipankar Mukherjee, Hamed Sadeghian, and Henk Nijmeijer "Estimation of overlay error using in-line subsurface scanning probe microscopy", Proc. SPIE 12955, Metrology, Inspection, and Process Control XXXVIII, 129550Q (9 April 2024); https://doi.org/10.1117/12.3010950
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KEYWORDS
Metals

Overlay metrology

Semiconducting wafers

Copper

Error analysis

Scanning probe microscopy

Modulation frequency

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