High-speed signal processing architectures using charge-coupled devices

Jayabharat Boddu; Satish S. Udpa; Lalita Udpa; Shiu Chuen Chan

doi:10.1117/12.50783

1 December 1991 High-speed signal processing architectures using charge-coupled devices

Jayabharat Boddu, Satish S. Udpa, Lalita Udpa, Shiu Chuen Chan

Proceedings Volume 1562, Devices for Optical Processing; (1991) https://doi.org/10.1117/12.50783
Event: San Diego, '91, 1991, San Diego, CA, United States

Abstract

The inherent speed and parallelism offered by many optical computational devices represent a distinct advantage over their electronic counterparts. Spatial Light Modulators (SLM) and the Charge Coupled Detectors (CCD) form an important class of such optoelectronic devices. This paper presents device structures using SLM/CCD devices for computing vector dot products. Since the computation of vector dot products constitutes one of the most heavily used operations in digital signal processing, such devices lend themselves well for very high speed signal processing applications. The versatility of the SLM/CCD devices is demonstrated by presenting several architectures for a scalar multiplier. An analytical model characterizing the performance of a SLM/CCD pair is presented. Examples involving the use of the device for signal processing applications is also given.

Citation Download Citation

Jayabharat Boddu, Satish S. Udpa, Lalita Udpa, and Shiu Chuen Chan "High-speed signal processing architectures using charge-coupled devices", Proc. SPIE 1562, Devices for Optical Processing, (1 December 1991); https://doi.org/10.1117/12.50783

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