Paper
5 April 1995 Novel Si substrate mode based wafer scale optical clock distribution architecture
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Abstract
In this paper we demonstrate a novel Si wafer based optical clock distribution technique operating 1.3 micrometers and based on a central polygonal input coupling grating structure and surrounding rings of linear output coupling gratings. In this arrangement, both the central polygonal and linear output gratings have a period of 1 micrometers , allowing light to be efficiently coupled into and out of the Si wafer substrate mode in the surface normal direction. A double side polished Si wafer is used to limit the surface scattering losses as the signal travels through the bulk of the Si wafer. One of the major advantages of this technique is that, since the gratings can be written onto the Si surface using optical contact lithography and reactive ion etching, an array of grating shapes and depths can be selected to optimize the diffraction efficiency and focus the output beams onto the associated multi-chip module (MCM). This helps to reduce the optical power requirements that a future system would have and also allows for greater flexibility in system packaging design.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Luke A. Graham, Oleg A. Ershov, Suning Tang, and Ray T. Chen "Novel Si substrate mode based wafer scale optical clock distribution architecture", Proc. SPIE 2400, Optoelectronic Interconnects III, (5 April 1995); https://doi.org/10.1117/12.206303
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Cited by 1 scholarly publication.
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KEYWORDS
Silicon

Semiconducting wafers

Etching

Diffraction gratings

Optical clocks

Diffraction

Surface finishing

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