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A new parallel multiplier design is proposed based on the technique of partitioning the operands into four groups however using different grouping and a combination of 4:2 compressor carry save adders for the accumulation of the 16 partial product terms. Also a design methodology of parallel multiplier is proposed which gives the designer more flexibility in finding the best trade off between the throughput rate and the hardware cost.
Amar Aggoun
"New parallel multiplier design", Proc. SPIE 3217, Image Processing, Signal Processing, and Synthetic Aperture Radar for Remote Sensing, (22 December 1997); https://doi.org/10.1117/12.295598
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Amar Aggoun, "New parallel multiplier design," Proc. SPIE 3217, Image Processing, Signal Processing, and Synthetic Aperture Radar for Remote Sensing, (22 December 1997); https://doi.org/10.1117/12.295598