Paper
28 April 1999 Process window overlap for posts and lines and spaces: optimization by resist type, optical settings, and mask bias
Michael T. Reilly, Karen Kvam, Jentry Willie
Author Affiliations +
Proceedings Volume 3741, Lithography for Semiconductor Manufacturing; (1999) https://doi.org/10.1117/12.346898
Event: Microelectronic Manufacturing Technologies, 1999, Edinburgh, United Kingdom
Abstract
Lines and spaces with posts are a typical combination of feature types for metal layer applications. A common process window for these is difficult to achieve, especially for equally sized features on the wafer. Foremost in attaining one is minimizing the differences in the dose to size of the feature. Many methods have been studied to maximize overlapping process windows of different features. Direct feature biasing, assist features and running NA and sigma are all methods that can be applied to maximize overlap. In this work, two different feature types, isolated and dense lines and posts, are examined. It is shown, through simulation and experimentation, how the overlapping process window (OLPW) of these features can be optimized. PROLITH software will be used to simulate OLPW with the latest resist models. This is examined experimentally, using an ASM 5500/300 DUV stepper with variable NA and partial coherence, for 250nm dense and isolated lines and 250 nm posts at optimal illumination settings which are determined by PROLITH. The improvements in OLPW due to resist type, e.g.; positive tine UV6 and negative tone UVN30, combined with optimal illumination coherence and mask bias, are shown. Mask feature bias is examined for the amounts that produce a common process at each of three partial coherence settings. Also given are the trends for isolated to dense and line to post proximity bias and the comparison of these to simulation.
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michael T. Reilly, Karen Kvam, and Jentry Willie "Process window overlap for posts and lines and spaces: optimization by resist type, optical settings, and mask bias", Proc. SPIE 3741, Lithography for Semiconductor Manufacturing, (28 April 1999); https://doi.org/10.1117/12.346898
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CITATIONS
Cited by 3 scholarly publications.
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KEYWORDS
Photomasks

Semiconducting wafers

Data modeling

Deep ultraviolet

Electroluminescence

Metals

Photoresist processing

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