Application of intentional defect arrays for assessing wafer inspection tool capabilities

Abbie L. Warrick; Amy B. Engbrecht; Richard J. Jarvis

doi:10.1117/12.473494

16 July 2002 Application of intentional defect arrays for assessing wafer inspection tool capabilities

Abbie L. Warrick, Amy B. Engbrecht, Richard J. Jarvis

Proceedings Volume 4689, Metrology, Inspection, and Process Control for Microlithography XVI; (2002) https://doi.org/10.1117/12.473494
Event: SPIE's 27th Annual International Symposium on Microlithography, 2002, Santa Clara, California, United States

Abstract

Substantial effort is underway to provide a more scientific approach for understanding and assessing the capabilities of current and emerging patterned wafer inspection tools. These elaborate and highly sensitive tools require time-consuming and complex analytical methods to accurately estimate the number of significant defects per specified area while minimizing detection of false and nuisance defects. Determining an inspection tool's capabilities-including accurately estimating capture rates, false count rates, and nuisance rates-requires the employment of relevant bench marking wafers containing well known and characterized defects in product-like patterns. Using intentionally created defects with an established size, location, and process layer allows for assessing a given inspection technology and evaluating how well the software executes the underlying detection physics through validation of its output against a known. International SEMATECH has created a set of reticles that contain intentional defects arrays within product-like patterns and layers. Each IDA die contains separate areas of metal line widths of 0.18 micrometers , 0.25 micrometers and 0.35 micrometers incorporating defect sizes at 25 percent, 50 percent and 100 percent of the feature size. Advanced lithographic capabilities were used to print the array die on 200 mm wafers using short-loop recipes for simulating gate and dual damascene copper process flows. This paper describes the methodology for the IDA wafer creation and the application of the wafers in tool bench marking, took setup, tool monitoring and tool matching.

Citation Download Citation

Abbie L. Warrick, Amy B. Engbrecht, and Richard J. Jarvis "Application of intentional defect arrays for assessing wafer inspection tool capabilities", Proc. SPIE 4689, Metrology, Inspection, and Process Control for Microlithography XVI, (16 July 2002); https://doi.org/10.1117/12.473494

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available