Pattern comparator trigger algorithm: implementation in FPGA

K. Bunkowski; A. Kalinowski; Jan Krolikowski; Ignacy Maciej Kudla; Krzysztof T. Pozniak; Grzegorz Wrochna

doi:10.1117/12.531573

24 October 2003 Pattern comparator trigger algorithm: implementation in FPGA

K. Bunkowski, A. Kalinowski, Jan Krolikowski, Ignacy Maciej Kudla, Krzysztof T. Pozniak, Grzegorz Wrochna

Proceedings Volume 5125, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments; (2003) https://doi.org/10.1117/12.531573
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2002, 2002, Wilga, Poland

Abstract

The article describes the algorithm of finding the highest transverse momentum muon based on the signals from fast RPC detectors in CMS experiment at the LHC collider in CERN (Geneva). Very fast progress in FPGA performance makes it possible to build Pattern Comparator Processor (PAC) using this technology. Compilation and simulation of different configurations of PAC are discussed. Improved algorithm which requires smaller resources in the FPGAs is presented.

Citation Download Citation

K. Bunkowski, A. Kalinowski, Jan Krolikowski, Ignacy Maciej Kudla, Krzysztof T. Pozniak, and Grzegorz Wrochna "Pattern comparator trigger algorithm: implementation in FPGA", Proc. SPIE 5125, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments, (24 October 2003); https://doi.org/10.1117/12.531573

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