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Interceptor missiles process IR images to locate an intended target
and guide the interceptor towards it. Signal processing requirements
have increased as the sensor bandwidth increases and interceptors
operate against more sophisticated targets. A typical interceptor
signal processing chain is comprised of two parts. Front-end video
processing operates on all pixels of the image and performs such
operations as non-uniformity correction (NUC), image stabilization,
frame integration and detection. Back-end target processing, which
tracks and classifies targets detected in the image, performs such
algorithms as Kalman tracking, spectral feature extraction and target
discrimination.
In the past, video processing was implemented using ASIC components or
FPGAs because computation requirements exceeded the throughput of
general-purpose processors. Target processing was performed using
hybrid architectures that included ASICs, DSPs and general-purpose
processors. The resulting systems tended to be function-specific, and
required custom software development. They were developed using
non-integrated toolsets and test equipment was developed along with
the processor platform. The lifespan of a system utilizing the signal
processing platform often spans decades, while the specialized nature
of processor hardware and software makes it difficult and costly to
upgrade. As a result, the signal processing systems often run on
outdated technology, algorithms are difficult to
update, and system effectiveness is impaired by the inability to
rapidly respond to new threats.
A new design approach is made possible three developments; Moore's Law
- driven improvement in computational throughput; a newly introduced
vector computing capability in general purpose processors; and a
modern set of open interface software standards. Today's
multiprocessor commercial-off-the-shelf (COTS) platforms have
sufficient throughput to support interceptor signal processing
requirements. This application may be programmed under existing
real-time operating systems using parallel processing software
libraries, resulting in highly portable code that can be rapidly
migrated to new platforms as processor technology evolves. Use of
standardized development tools and 3rd party software upgrades are
enabled as well as rapid upgrade of processing components as improved
algorithms are developed. The resulting weapon system will have a
superior processing capability over a custom approach at the time of
deployment as a result of a shorter development cycles and use of
newer technology. The signal processing computer may be
upgraded over the lifecycle of the weapon system, and can
migrate between weapon system variants enabled by modification
simplicity.
This paper presents a reference design using the new approach that
utilizes an Altivec PowerPC parallel COTS platform. It uses a
VxWorks-based real-time operating system (RTOS), and application code
developed using an efficient parallel vector library (PVL). A
quantification of computing requirements and demonstration of
interceptor algorithm operating on this real-time platform are
provided.
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