Whole wafer imprint patterning using step and flash imprint lithography: a manufacturing solution for sub-100-nm patterning

David Lentz; Gary Doyle; Mike Miller; Gerald Schmidt; Maha Ganapathisuramanian; Xiaoming Lu; Doug Resnick; Dwayne L. LaBrake

doi:10.1117/12.720671

16 March 2007 Whole wafer imprint patterning using step and flash imprint lithography: a manufacturing solution for sub-100-nm patterning

David Lentz, Gary Doyle, Mike Miller, Gerald Schmidt, Maha Ganapathisuramanian, Xiaoming Lu, Doug Resnick, Dwayne L. LaBrake

Author Affiliations +

Proceedings Volume 6517, Emerging Lithographic Technologies XI; 65172F (2007) https://doi.org/10.1117/12.720671
Event: SPIE Advanced Lithography, 2007, San Jose, California, United States

Abstract

Imprint lithography has been shown to be an effective technique for the replication of nano-scale features¹. When the imprint material is a UV cross linkable liquid, it is possible to perform the patterning process at room temperature and ambient pressure, which enables good pattern fidelity, short processing times, and reduced process defectivity². Imprinting whole wafers using drop on demand dispense techniques offers improved throughput and nanopatterning over wafer topography which can exceed 10 μm. Template fabrication of arbitrary whole wafer patterns offers unique challenges for 1x feature fabrication. The resolution and pattern area of the imprint approach is strictly dependent on the ability to create a 1X master template. This paper provides a detailed description of whole wafer templates, imprint patterning processes, and etch processes that have been employed to create a whole wafer archetype process through hard mask patterning. Particular attention is given to high volume manufacturing focused on whole wafer template fabrication, throughput and pattern fidelity. Step and Flash Imprint Lithography (S-FIL^TM) makes use of templates that can be fabricated with the same patterning and etch transfer processes that are used for manufacturing phase-shifting photo masks. In the case of whole wafer templates the master die pattern is fabricated using conventional techniques. The replicate template carries the full wafer die pattern imprinted by step and repeat using the master. The S-FIL/R process can be used for patterning the replicate template³. The structure, pattern fidelity and critical dimension uniformity of the master and replicate templates and patterned wafer is shown to be within measurement errors.

Citation Download Citation

David Lentz, Gary Doyle, Mike Miller, Gerald Schmidt, Maha Ganapathisuramanian, Xiaoming Lu, Doug Resnick, and Dwayne L. LaBrake "Whole wafer imprint patterning using step and flash imprint lithography: a manufacturing solution for sub-100-nm patterning", Proc. SPIE 6517, Emerging Lithographic Technologies XI, 65172F (16 March 2007); https://doi.org/10.1117/12.720671

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