Acceleration of feature extraction for FPGA-based speech recognition

Vytautas Arminas; Gintautas Tamulevicius; Dalius Navakauskas; Edgaras Ivanovas

doi:10.1117/12.872081

14 September 2010 Acceleration of feature extraction for FPGA-based speech recognition

Vytautas Arminas, Gintautas Tamulevicius, Dalius Navakauskas, Edgaras Ivanovas

Proceedings Volume 7745, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2010; 774511 (2010) https://doi.org/10.1117/12.872081
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2010, 2010, Wilga, Poland

Abstract

The paper describes a field programmable gate array implementation of the main part of speech recognition system - feature extraction. In order to accelerate recognition the whole cepstral analysis scheme is implemented in hardware by the use of intellectual property cores. Two field programmable gate array devices are used for evaluation. Comparative experimental results of four different implementations are presented. They grounds achieved 29 times faster speech analysis in comparison with software based analysis subsystem.

Citation Download Citation

Vytautas Arminas, Gintautas Tamulevicius, Dalius Navakauskas, and Edgaras Ivanovas "Acceleration of feature extraction for FPGA-based speech recognition", Proc. SPIE 7745, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2010, 774511 (14 September 2010); https://doi.org/10.1117/12.872081

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