State of the art direct digital frequency synthesis methodologies and their performance on FPGA

Mariangela Genovese; Ettore Napoli

doi:10.1117/12.2017271

28 May 2013 State of the art direct digital frequency synthesis methodologies and their performance on FPGA

Mariangela Genovese, Ettore Napoli

Proceedings Volume 8764, VLSI Circuits and Systems VI; 87640V (2013) https://doi.org/10.1117/12.2017271
Event: SPIE Microtechnologies, 2013, Grenoble, France

Abstract

The Direct Digital Frequency Synthesizer (DDFS) is a critical component routinely implemented in many electronic systems. Advanced DDFS design techniques have been proposed but they optimize the performance for a given ASIC (Application Specific Integrated Circuits) technology. Nowadays, FPGA are very often used for the release of electronic systems. As a consequence, the study of the performance of advanced DDFS design techniques when implemented on FPGA devices, is of great interest. The paper presents various implementation of state of the art DDFS on various FPGA and compares their performance providing hints on optimal design as a function of the chosen performance parameter.

Citation Download Citation

Mariangela Genovese and Ettore Napoli "State of the art direct digital frequency synthesis methodologies and their performance on FPGA", Proc. SPIE 8764, VLSI Circuits and Systems VI, 87640V (28 May 2013); https://doi.org/10.1117/12.2017271

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