Towards leakage resiliency: memristor-based AES design for differential power attack mitigation

Ganesh Khedkar; Colin Donahue; Dhireesha Kudithipudi

doi:10.1117/12.2053373

22 May 2014 Towards leakage resiliency: memristor-based AES design for differential power attack mitigation

Ganesh Khedkar, Colin Donahue, Dhireesha Kudithipudi

Proceedings Volume 9119, Machine Intelligence and Bio-inspired Computation: Theory and Applications VIII; 911907 (2014) https://doi.org/10.1117/12.2053373
Event: SPIE Sensing Technology + Applications, 2014, Baltimore, MD, United States

Abstract

Side-channel attacks (SCAs), specifically differential power attacks (DPA), target hardware vulnerabilities of cryptosystems. Next generation computing systems, integrated with emerging technologies such as RRAM, offer unique opportunities to mitigate DPAs with their inherent device characteristics. We propose two different approaches to mitigate DPA attacks using memristive hardware. The first approach, obfuscates the power profile using dual RRAM modules. The power profile stays almost uniform for any given data access. This is achieved by realizing a memory and its complementary module in RRAM hardware. Balancing logic, which ensures the parallel access, is implemented in CMOS. The power consumed with the dual-RRAM balancing is an order lower than the corresponding pure CMOS implementation. The second exploratory approach, uses a novel neuromemristive architecture to compute an AES transformation and mitigate DPAs. Both the proposed approaches were tested on a 128-bit AES algorithm. A customized simulation framework, integrating CAD tools, is developed to mount the DPA attacks. In both the designs, the attack mounted on the baseline architectures (CMOS only) was successful and full key was recovered. However, DPA attacks mounted on the dual RRAM modules and neuromemristive hardware modules of an AES cryptoprocessor yielded no successful keys, demonstrating their resiliency to DPA attacks.

Citation Download Citation

Ganesh Khedkar, Colin Donahue, and Dhireesha Kudithipudi "Towards leakage resiliency: memristor-based AES design for differential power attack mitigation", Proc. SPIE 9119, Machine Intelligence and Bio-inspired Computation: Theory and Applications VIII, 911907 (22 May 2014); https://doi.org/10.1117/12.2053373

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available