Pipelined time-division multiplexing optical bus with conditional delays

Yueming Li; Yi Pan; Si Qing Zheng

doi:10.1117/1.601494

1 September 1997 Pipelined time-division multiplexing optical bus with conditional delays

Yueming Li, Yi Pan, Si Qing Zheng

Optical Engineering, Vol. 36, Issue 9, (September 1997). https://doi.org/10.1117/1.601494

A new pipelined time-division multiplexing optical bus for implementing a linear-array parallel computer architecture is proposed. In this system, switches are introduced on the receiving segment of the bus to control the signal delays on the optical waveguide. The states of switches are dynamically programmable under the control of processors according to computation needs. In conjunction with coincident pulse processor addressing technique, the reconfigurability of signal delays becomes an integral part of parallel computation, as demonstrated by parallel algorithm design examples. The linear processor arrays based on such buses can be used as building blocks to construct parallel architectures of higher dimensions to achieve improved scalability and performance.

Citation Download Citation

Yueming Li, Yi Pan, and Si Qing Zheng "Pipelined time-division multiplexing optical bus with conditional delays," Optical Engineering 36(9), (1 September 1997). https://doi.org/10.1117/1.601494

Published: 1 September 1997

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available