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In the field of space remote sensing, a visible CMOS detector with a long line of small pixels is needed. In order to meet the requirement of high-resolution earth observation, this paper designs a long-line CMOS detector integrated with PIN detector and readout circuit, based on 0.35 micron process. To reduce the equivalent input noise of the device by true correlation double sampling, CTIA integral amplifier followed by four sampling follow circuit is adopted. In order to meet the requirements of high sampling rate of imaging detection, a four sampling long-line CMOS detector with 10 MHz sampling frequency is designed in this paper. By reducing the width to length ratio of the first stage P-type following transistor to decrease the bus parasitic capacitance and reducing the bias voltage of the P-type following load transistor to increase the driving current, thus the sampling frequency of the read-out circuit is increased from the original 2 MHz to the 10 MHz, which effectively improves the readout frequency of the long-line visible light CMOS detector, In order to achieve true correlated double sampling and reduce the equivalent input noise of the device, the muliti-sampling is used to connect CTIA integral amplifier. Then a low noise and high sampling rate CMOS detector is developed. Through the test, the SNR of CMOS detector can be more than 350, which is twice as that of conventional reading technology. the CMOS detector possesses an equivalent input noise electron less than 50e when the integral time is 200 us and the area of photosensitive is 20 um × 18 um, it can work steadily at the sampling rate of 10MHz, its MTF can exceed 0.5 when it work at 4MHz. The linearity, the output swing and the sensitivity of the detector can meet the requirements of the Aerospace remote system. The development of the CMOS detector has laid an important theoretical foundation and practical value for the future ultra high speed and high definition imaging detection.
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