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Automated generation of Layout Pattern Catalogs (LPC) has been enabled by full-chip pattern matching EDA tools, capable of searching and classifying both topological and dimensional variations in layout shapes, extracting massive datasets of component patterns from one (or more) given layouts. This work presents a novel theoretical framework for the systematic analysis of Layout Pattern Catalogs (LPC). Two algebraic structures (lattices and matroids) are introduced, allowing for the complete characterization of all LPC datasets. Technical results go beyond the general mathematical theory of combinatorial pattern spaces, demonstrating a direct path to novel physical design verification algorithms and DFM optimization applications.
Luigi Capodieci andVito Dai
"Layout pattern catalogs: from abstract algebra to advanced applications for physical verification and DFM", Proc. SPIE 11614, Design-Process-Technology Co-optimization XV, 1161407 (22 February 2021); https://doi.org/10.1117/12.2585319
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Luigi Capodieci, Vito Dai, "Layout pattern catalogs: from abstract algebra to advanced applications for physical verification and DFM," Proc. SPIE 11614, Design-Process-Technology Co-optimization XV, 1161407 (22 February 2021); https://doi.org/10.1117/12.2585319