Technology for high density CD measurement of EUV-processed resist patterns across a wafer ensuring high throughput and precision

Taeko Matsukata; Kazuhiko Fukazawa; Shigeru Hirukawa; Kaori Mukai; Yosuke Miyazaki; Yoshihiko Fujimori; Tomohiro Iwaki; Tomonori Okada

doi:10.1117/12.3010278

9 April 2024 Technology for high density CD measurement of EUV-processed resist patterns across a wafer ensuring high throughput and precision

Taeko Matsukata, Kazuhiko Fukazawa, Shigeru Hirukawa, Kaori Mukai, Yosuke Miyazaki, Yoshihiko Fujimori, Tomohiro Iwaki, Tomonori Okada

Author Affiliations +

Proceedings Volume 12955, Metrology, Inspection, and Process Control XXXVIII; 129552O (2024) https://doi.org/10.1117/12.3010278
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States

Conference Poster

Abstract

With the advancement of semiconductor device miniaturization, the critical dimension (CD) has reached several tens of nanometers. To meet high yield demands, strict CD control is crucial. However, conventional CD measurement methods such as SEM and scatterometry have a problem; the measurement time increases in proportion to the number of measurement points. To solve this problem, we have developed a CD measurement technology that enables high density measurement of more than 100,000 points on the wafer surface in a few minutes per wafer.1 The CD value is calculated from the correlation between the diffracted light signal and CD. Despite the advantages this method provides, there still have been challenges. Measuring the critical dimensions of resist patterns of several tens of nanometers formed in EUV lithography across the entire wafer sometimes poses difficulties due to insufficient sensitivity with diffracted light, making high-precision CD measurement difficult. In this paper, we propose an enhanced measurement technique that quantifies the changes in the polarization state of diffracted light and reflected light from the wafer as Stokes parameters and calculates the CD based on the correlation between the obtained Stokes parameters and the CD value. Theoretically, it is sensitive to resist patterns of a few nanometers. For accuracy verification, we measured next-generation DRAM process wafers, including EUV-processed wafers. The minimum of measurement error, which compared with the CD value measured by SEM, achieved to 3σ = 0.57. The total time for wafer measurement and calculation processing was about a few minutes per wafer for over 10,000 points on the wafer surface.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

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Taeko Matsukata, Kazuhiko Fukazawa, Shigeru Hirukawa, Kaori Mukai, Yosuke Miyazaki, Yoshihiko Fujimori, Tomohiro Iwaki, and Tomonori Okada "Technology for high density CD measurement of EUV-processed resist patterns across a wafer ensuring high throughput and precision", Proc. SPIE 12955, Metrology, Inspection, and Process Control XXXVIII, 129552O (9 April 2024); https://doi.org/10.1117/12.3010278

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