Advanced photolithographic process modeling and characterization via wafer flatness measurements

Satyendra S. Sethi; Sagar M. Pushpala; Terry L. Von Salza Brown; Clifford H. Takemoto; Gabriel M. Li; James L. Kawski; Randal K. Goodall; H. Noguchi; David Luo

doi:10.1117/12.174131

1 May 1994 Advanced photolithographic process modeling and characterization via wafer flatness measurements

Satyendra S. Sethi, Sagar M. Pushpala, Terry L. Von Salza Brown, Clifford H. Takemoto, Gabriel M. Li, James L. Kawski, Randal K. Goodall, H. Noguchi, David Luo

Author Affiliations +

Proceedings Volume 2196, Integrated Circuit Metrology, Inspection, and Process Control VIII; (1994) https://doi.org/10.1117/12.174131
Event: SPIE's 1994 Symposium on Microlithography, 1994, San Jose, CA, United States

Abstract

In this work critical dimension (CD) and site focal plane deviation (SFPD) measurements were made on a patterned resist test structure with 0.8 micron dense lines with a pitch of 1.6 micrometers . The CD and SFPD were tracked through all critical wafer processing steps. The range in SFPD was negligible throughout front end processing, with average SFPDs less than 0.25 microns. Significant increase in the mean and variance of SFPD was observed at later process modules. An increase in the SFPD directly reduces the focus budget, resulting in an increase in the variation of the CD across a field as well as a degradation of the resist profile. Within-field CD variation (3 sigma) for a SFPD of 0.05 micrometers was observed to be less than 0.03 micrometers (30 measurement sites within a field) whereas the three sigma CD variation for a SFPD of 3.8 micrometers was observed to be 0.45 micrometers . Two-dimensional and 3-D graphical correlations are presented, and the use of the SFPD/CD correlation technique to photolithographic process optimization is discussed.

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Satyendra S. Sethi, Sagar M. Pushpala, Terry L. Von Salza Brown, Clifford H. Takemoto, Gabriel M. Li, James L. Kawski, Randal K. Goodall, H. Noguchi, and David Luo "Advanced photolithographic process modeling and characterization via wafer flatness measurements", Proc. SPIE 2196, Integrated Circuit Metrology, Inspection, and Process Control VIII, (1 May 1994); https://doi.org/10.1117/12.174131

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