CMOS analog integrated circuit for detector readout at a 50-MHz pixel rate

John A. McNeill; Jennifer Stander; Chris A. Raanes

doi:10.1117/12.273430

28 May 1997 CMOS analog integrated circuit for detector readout at a 50-MHz pixel rate

John A. McNeill, Jennifer Stander, Chris A. Raanes

Proceedings Volume 2869, 22nd International Congress on High-Speed Photography and Photonics; (1997) https://doi.org/10.1117/12.273430
Event: 22nd International Congress on High-Speed Photography and Photonics, 1996, Santa Fe, NM, United States

Abstract

This paper describes a high speed, low noise analog integrated circuit which has been designed to interface with charge-coupled device (CCD) arrays in high speed CCD camera systems. This IC performs the analog signal processing functions required between the CCD output and analog-to- digital converter input. Channel gain can be adjusted from 2.7 to 12 in 16 steps as specified by a 4 bit digital word. The chip operates from power supply voltages of +/- 5 V, dissipates 380 mW/channel, and has an input referred noise of 260 (mu) V rms.

Citation Download Citation

John A. McNeill, Jennifer Stander, and Chris A. Raanes "CMOS analog integrated circuit for detector readout at a 50-MHz pixel rate", Proc. SPIE 2869, 22nd International Congress on High-Speed Photography and Photonics, (28 May 1997); https://doi.org/10.1117/12.273430

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