Paper
4 September 1998 Performance, standby power, and manufacturability trade-off in transistor design consideration for 0.25-μm technology
Navakanta Bhat, Harry Chuang, Paul Tsui, R. Woodruff, John Grant, R. Kruth, Asanga H. Perera, Stephen Poon, Sean Collins, D. Dyer, Veena Misra, I. Yang, Suresh Venkatesan, Percy V. Gilbert
Author Affiliations +
Abstract
In this paper, we compare four different approaches for transistor design for the 0.25 micrometer technology from the point of view of performance, stand-by power and ease of manufacturing. For the high performance logic applications such as high end microprocessors, 0.18 micrometer transistor (Lgate equals 0.18 plus or minus 0.02 micrometer) with super steep retrograde wells and halo implants but without extension implants can achieve maximum frequency of operation (Fmax) exceeding 380 Mhz for the 0.25 micrometer technology. On the other hand, for low power applications such as mobile communication equipments, a different 0.22 micrometer (Lgate equals 0.22 plus or minus 0.02 micrometer) transistor design which simplifies manufacturing process by eliminating two photolithography steps becomes more attractive. The four transistor designs are compared using CV/I metric and manufacturability trade-offs are discussed.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Navakanta Bhat, Harry Chuang, Paul Tsui, R. Woodruff, John Grant, R. Kruth, Asanga H. Perera, Stephen Poon, Sean Collins, D. Dyer, Veena Misra, I. Yang, Suresh Venkatesan, and Percy V. Gilbert "Performance, standby power, and manufacturability trade-off in transistor design consideration for 0.25-μm technology", Proc. SPIE 3506, Microelectronic Device Technology II, (4 September 1998); https://doi.org/10.1117/12.323963
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KEYWORDS
Transistors

Manufacturing

Capacitance

Logic

CMOS technology

Design for manufacturability

Fermium

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