Paper
21 March 2006 Wafer management between coat/developer track and immersion lithography tool
Tomoharu Fujiwara, Kenichi Shiraishi, Hirokazu Tanizaki, Yuuki Ishii, Hideharu Kyoda, Taro Yamamoto, Seiki Ishida
Author Affiliations +
Abstract
The ArF immersion lithography is a probable technique for the application below 65 nm hp generation. The first immersion lithography scanner, the engineering evaluation tool (EET) being connected inline with a coat/developer (C/D) ACT12 (Tokyo Electron Ltd.), was completed in the end of 2004 and showed that a bit of residual water might make a watermark on the wafer. Tokyo Electron Ltd. and Nikon Corp. have challenged to resolve this problem from a point of view of improvements on the system components for production tools. Nikon improves on local water filling nozzle, wafer table and wafer loader. The nozzle and the wafer table in the exposure tool are optimized to diminish the residual water, while the wafer stage is driven at high speed for high throughput of the production tool. However a bit of water, the amount of which also depends on a topcoat material, may remain. The wafer loader should carry the wafer to the C/D before drying up it. Before post exposure bake (PEB), C/D rinses and dries the wafer immediately to prevent it from the generation of watermark by remaining water. The wafer handling condition including rinse of which is optimized using the ACT12 connected to the EET and have applied to the new C/D LITHIUSi+ connected to S609B, the first Nikon's immersion scanner for mass production. In this report, we present the latest immersion technology, including the wafer contamination control, which is developed through the collaboration between Tokyo Electron Ltd. and Nikon Corp.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tomoharu Fujiwara, Kenichi Shiraishi, Hirokazu Tanizaki, Yuuki Ishii, Hideharu Kyoda, Taro Yamamoto, and Seiki Ishida "Wafer management between coat/developer track and immersion lithography tool", Proc. SPIE 6154, Optical Microlithography XIX, 61544L (21 March 2006); https://doi.org/10.1117/12.656303
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Cited by 2 patents.
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KEYWORDS
Semiconducting wafers

Scanners

Digital watermarking

Immersion lithography

Particles

Thin film coatings

Bridges

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