Paper
1 April 2008 Demonstration of production readiness of an immersion lithography cell
Alberto Beccalli, Paolo Canestrari, Mark Goeke, Masashi Kanaoka, Helmut Kandraschow, Takuya Kuroda, Danilo De Simone, Paolo Piacentini, Miriam Padovani, Paolo Piazza, Alessandro Rossi
Author Affiliations +
Abstract
This paper describes the qualification work performed on a state-of-the-art immersion cluster and shows results for an immersion process for the 45nm node. These results demonstrate full compliance with all lithographic parameters, including CD control and defectivity. Qualification was performed on an RF3iTM wafer track from Sokudo Co., Ltd. and a 1.2NA immersion scanner. A three-layer material stack was engineered using 820Å BARC / 1800Å ArF photoresist covered by 900Å immersion top-coat. After verification of tool and process cleanliness and testing the robustness of the material stack for use in the immersion scanner, resulting photo cell monitor (PCM) defect density on a 65nm memory device was evaluated. Critical dimension was verified using both CD-SEM and optical CD metrology. Results on a 45nm L/S pattern showed 0.55nm WIW 3sigma CD uniformity using optical CD metrology. Lot to lot CD control was tested for being below 1.5nm 3sigma. As special Soak-units were used prior to post exposure bake (PEB), the influence of post exposure delay (PED) on the CD performance was studied and quantified. All immersion-related modules were optimized and qualified on both 65nm products and 45nm prototypes. Additionally, comparison data for immersion and dry lithography will be presented.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Alberto Beccalli, Paolo Canestrari, Mark Goeke, Masashi Kanaoka, Helmut Kandraschow, Takuya Kuroda, Danilo De Simone, Paolo Piacentini, Miriam Padovani, Paolo Piazza, and Alessandro Rossi "Demonstration of production readiness of an immersion lithography cell", Proc. SPIE 6924, Optical Microlithography XXI, 69244X (1 April 2008); https://doi.org/10.1117/12.779150
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Semiconducting wafers

Critical dimension metrology

Immersion lithography

Lithography

Scanners

Silicon

Photoresist materials

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