Improved 10GBase-LX4 limiting amplifier in a low-cost 0.18 µm CMOS technology

J. M. García del Pozo; S. Celma; A. Otín

doi:10.1117/12.821369

28 May 2009 Improved 10GBase-LX4 limiting amplifier in a low-cost 0.18 μm CMOS technology

J. M. García del Pozo, S. Celma, A. Otín

Proceedings Volume 7363, VLSI Circuits and Systems IV; 73630D (2009) https://doi.org/10.1117/12.821369
Event: SPIE Europe Microtechnologies for the New Millennium, 2009, Dresden, Germany

Abstract

This work overcomes the limitations of a previous work by using three high frequency compensation techniques: polezero cancellation, shunt-peaking and downscaling. By considering these strategies, a fully integrated limiting amplifier in a low-cost 0.18 μm CMOS digital process is introduced. This design improves the original design without inductors and without local multi-feedback loops obtaining a compact, stable and robust design perfectly intended for low-voltage applications.

Citation Download Citation

J. M. García del Pozo, S. Celma, and A. Otín "Improved 10GBase-LX4 limiting amplifier in a low-cost 0.18 μm CMOS technology", Proc. SPIE 7363, VLSI Circuits and Systems IV, 73630D (28 May 2009); https://doi.org/10.1117/12.821369

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