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For more than two decades and through approximately ten technology nodes, the semiconductor industry has relied upon Dual Damascene copper interconnects. While there is vigorous debate as to the timing and dimensions of the transition, there is a general consensus that there will eventually be a need to replace copper with a different conductor metal. Motivations include copper’s requirement for space-consuming diffusion barriers and the contributions of interfacial electron scattering to higher resistance at smaller dimensions. Researchers such as D. Galla have proposed a range of candidate conductor metals, many of which would be patterned subtractively (by depositing blanket sheets of material and then etching away the portions not required for circuity). There is a growing body of literature considering the choice of metal, methods for controlling its morphology and electrical behavior, and processes for etching it. In this study, we examine a different facet of the transition from Damascene to subtractive conductor formation, specifically the role played by sidewall spacers in pattern formation and transfer. Because the dimensions at which non-Cu conductors may become competitive are well beyond the resolution limits of single exposure EUV, it is likely that an SADP process will be used. The common approach to pattern assembly for Damascene applications is to place mandrels where Cu conductors are ultimately desired, use ALD spacers on the mandrel sidewalls to define minimum-width dielectric spaces, then add a block pattern to define larger regions of dielectric and the remaining “non-mandrel” or “anti-mandrel” conductors. Then the mandrels are removed and the openings in the spacer+block mask are transferred into the dielectric, forming the trenches which will ultimately be filled with Cu. For subtractive metal patterning, preserving the existing circuit design and mask generating infrastructure favors a different approach: mandrels would still be placed at conductor locations and ALD spacers would still be used to define minimum dielectric spaces, but anti-mandrel conductor locations would be covered by new regions of masking material (rather than openings in the block mask). Then the spacers would be removed and the mandrels and anti-mandrel masks would be used to transfer the pattern into the metal below. This study focuses on comparison of the patterning performance of the two approaches using model structures to minimize the confounding impact of the subsequent etch steps (i.e., etching into ULK or metal). Topics of particular interest include LER, LWR, CDU, pitchwalking, and the effects of local variations in pattern density. Methods to improve patterning performance for both schemes will be discussed.
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