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10 April 2024 Area-selective deposition and bottom-up approaches: an overview of applications in IC manufacturing
Silvia Armini, Mikhail Krishtab, Mattia Pasquali, Jayant Kumar Lodha, Annelies Delabie, Marleen van der Veen, Farid Sebaai
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Proceedings Volume PC12958, Advanced Etch Technology and Process Integration for Nanopatterning XIII; (2024) https://doi.org/10.1117/12.3012745
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States
Abstract
As IC device downscaling gets closer to the sub-10 nm critical dimensions, conventional deposition/litho/etch integration schemes and patterning processes, based on photolithography and etching, are facing their fundamental limits for device downscaling. Atomically controlled depositions at specific locations can boost advances or enable innovative fabrication schemes. Of several paths being explored for novel bottom-up nanopatterning, area-selective atomic layer deposition (ASD) and area-selective wet etch (ASE) are attracting increasing interest because of its ability to enable both continued dimensional scaling and accurate pattern placement for next-generation nanoelectronics. In this talk, an overview of potential applications of ASD and ASE in IC manufacturing is provided together with insights into the most relevant surface reaction mechanisms.
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Silvia Armini, Mikhail Krishtab, Mattia Pasquali, Jayant Kumar Lodha, Annelies Delabie, Marleen van der Veen, and Farid Sebaai "Area-selective deposition and bottom-up approaches: an overview of applications in IC manufacturing", Proc. SPIE PC12958, Advanced Etch Technology and Process Integration for Nanopatterning XIII, (10 April 2024); https://doi.org/10.1117/12.3012745
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KEYWORDS
Manufacturing
Atomic layer deposition
Etching
Optical lithography
Atomic layer etching
Fabrication
Nanoelectronics
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