Mr. Akie Yutani Profile

Akie Yutani

at Mitsubishi Electric Corp

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Proceedings Article | 23 April 2020 Paper

Development of new pixel structure for beyond 12-µm pixel pitch SOI diode uncooled IRFPAs

D. Fujisawa, M. Hanaoka, Y. Kosasayama, A. Yutani, K. Shintani, H. Hata, M. Ueno, T. Takenaga, M. Yamamuka

Proceedings Volume 11407, 114071A (2020) https://doi.org/10.1117/12.2558287

KEYWORDS: Diodes, Temperature sensors, Silicon

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We developed silicon-on-insulator (SOI) diode-based uncooled infrared focal plane arrays (IRFPAs), in which single-crystal pn junction diodes formed in an SOI layer are used as temperature sensors. These diodes, based on silicon large-scale integration technology, offer excellent uniformity, and have led to the use of high-performance uncooled IRFPAs in a wide variety of applications. In order to extend the pitch to less than 12 μm, a scalable new pixel structure has been developed to reduce the pixel size, based on a novel thermally isolated structure, which is fabricated above a CMOS processed wafer. The pn junction diodes used as a temperature sensor are separated from the underlying substrate by supporting legs made from thin metal wire, forming a cavity. To reduce the pixel size, we are developing a new diode structure by optimizing the ion implantation condition, thinning the SOI layer, and redesigning the supporting legs, achieving a smaller pixel size even with ten serially connected diodes. We also evaluated a new readout circuit architecture that enables an increase in sensitivity by generating a larger change in the diode forward voltage at a given temperature with no change in the number of diodes in the SOI layer. The effectiveness of the proposed readout circuit architecture was verified using a fabricated test element. The sensitivity of the test element was 128% of that for existing circuit structures, and further increases are expected with circuit structure optimization. These techniques have greatly enhanced the performance of our SOI diode based uncooled IRFPAs.

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