The Skipper CCD-in-CMOS image sensor integrates the non-destructive readout capability of skipper Charge Coupled Devices (CCDs) with a high conversion gain pinned photodiode on a CMOS imaging process, while taking advantage of in-pixel signal processing.
We will present the first results of the testing of the first prototype ASIC, fabricated in a commercial 180nm CMOS processes, which integrates a pixel matrix as well as individual test structures. Individual pixels in the test structures of the fabricated devices were instrumented to characterize their charge transfer capability and to study their operation in low readout noise conditions. We were able to operate the pixel in single carrier counting mode with deep sub-electron noise to measure charge packets collected by the photodiode when exposed to low illumination levels. Additionally, we will also report on the status of the custom 65nm ASICs prototypes being developed to achieve high speed, sub-electron noise readout. Work supported by the DOE Office of Science under the Microelectronics Co-Design Research Project “Hybrid Cryogenic Detector Architectures for Sensing and Edge Computing enabled by new Fabrication Processes
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