Optical computing promises to play a major role in hardware chips dedicated to artificial intelligence (AI). Digital electronics, when employed in computing hardware, face the sunset of Moore’s law and the acknowledged end of Dennard Scaling (energy density of shrinking transistors). In response to these limitations, a paradigm shift towards nondigital processing is on the horizon. In optical computing devices for AI, the dominant mathematical operation is vectormatrix multiplication. It is typically limited to very small vector and matrix sizes. Most approaches don’t allow for significant scaling. In this context, our work focuses on the development of a silicon photonics tensor core that exhibits a unique scalability feature, enabling effective expansion to accommodate large matrix sizes. This scalability is deemed essential for the realization of meaningful AI accelerator products leveraging photonic hardware.
In this work, we discuss the requirements and challenges of designing a photonic computing chip that can be deployed in the latest commercial AI systems. Silicon Photonics have the potential to revolutionize AI computing by delivering unprecedented improvements in the power consumption and computational throughput of AI computations. Still, there are several challenges to be tackled. Among these are the need to design high-density photonic integrated circuits, designing photonic memory systems for data storage, and solving the bottleneck of the electrical-to-optical conversions. Several innovative photonic technologies have been introduced to address these challenges. The progress on implementing these technologies is discussed.
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