KEYWORDS: Etching, Plasma etching, Plasma, Climate change, Gases, Transistors, Power consumption, Front end of line, Sustainable technology, CMOS technology
The semiconductor industry is aware of its high resource consumption and overall impact on the environment and is working to minimize it. Especially, the use of perfluorocarbons (PFC) during the dry etching and deposit steps of device manufacturing is a major concern because of the extremely high global warming potential (GWP) and lifetime of most of those compounds. Consequently, plasma etching significantly contributes to CO2 emissions for sub-28nm technologies on Scope 1 and 2 emissions. Currently, CEA-Leti is developing a 10nm node on FDSOI (Fully Depleted Silicon On Insulator) technology. In this framework, we present Life Cycle Assessment (LCA) of etching processes for FDSOI transistor technologies. A comparison of impacts between the 28nm node and 10 nm one is then conducted for FEOL and MEOL processes. Finally, based on these results, some eco-innovation proposals are discussed.
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