The Wide Field Survey Telescope (WFST) is being developed by University of Science and Technology of China and Purple Mountain Observatory. The camera of WFST is proposed to image with a mosaic Charge-coupled devices (CCD) array, which consists of 9 CCD290-99 detectors. It has requirements of decreasing the size and reducing total power dissipation for electronics system. Considering the demands of CCD290-99, two chips Application-specified Integrated Circuits (ASIC) were designed, called Second Version of Bias-Clock-Driver ASIC (BCDA2) and Second Version of CCDVideo- Readout ASIC(CVRA2) respectively. These chips have been upgraded and optimized based on the BCDA and CVRA. BCDA2 provides multi-channel clocks and biases to drive CCD290-99 and CVRA2 is used for the readout circuits of CCD signal processing. BCDA2 integrates 5 channels low noise biases with adjustable voltage and 9 channels low power dissipation clocks with adjustable driving capability. CVRA2 integrates 4 channels low noise readout circuits. Serial Peripheral Interface (SPI) was designed for configuration of BCDA2. BCDA2 and CVRA2 were designed with the Global Foundries 180 nm BCDlite technology. The area of bare chip is 3.1mm × 6mm.
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