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5 November 2020 Optimized design of 4H-SiC UMOSFET for high breakdown voltage
Xian Zou, Zhiming Wu, Weiping Wang, Defu Yin, Guangrong Li, Yongqiang Sun, Yaping Wu, Xu Li, Junyong Kang
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Proceedings Volume 11567, AOPC 2020: Optical Sensing and Imaging Technology; 115673Y (2020) https://doi.org/10.1117/12.2580265
Event: Applied Optics and Photonics China (AOPC 2020), 2020, Beijing, China
Abstract
In this work, we develop an optimized 4H-SiC U-shaped trench-gate MOSFET structure with a high breakdown voltage. In the optimized structure, a p+ shield is added under the gate oxide and the drift layer is divided into multilayers with different doping concentration. Simulation results reveal that adding a p+ shield and lowering the doping concentration around the corner of U-shape trench can effectively protect the gate oxide, resulting a significant improvement of the breakdown voltage. As a result, the breakdown voltage of the optimized structure increases by 47.7% compared with that of the conventional structure, corresponding to an improvement of 32.2% in figure of merit.
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Xian Zou, Zhiming Wu, Weiping Wang, Defu Yin, Guangrong Li, Yongqiang Sun, Yaping Wu, Xu Li, and Junyong Kang "Optimized design of 4H-SiC UMOSFET for high breakdown voltage", Proc. SPIE 11567, AOPC 2020: Optical Sensing and Imaging Technology, 115673Y (5 November 2020); https://doi.org/10.1117/12.2580265
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KEYWORDS
Doping
Oxides
Silicon carbide
Field effect transistors
Device simulation
Semiconductors
Transistors
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