Device-scaling constraints based upon delay-time arguments

Robert J. Trew; Umesh K. Mishra

doi:10.1117/12.20905

1 August 1990 Device-scaling constraints based upon delay-time arguments

Robert J. Trew, Umesh K. Mishra

Proceedings Volume 1288, High-Speed Electronics and Device Scaling; (1990) https://doi.org/10.1117/12.20905
Event: Advances in Semiconductors and Superconductors: Physics Toward Devices Applications, 1990, San Diego, CA, United States

Abstract

Extracted delay times provide information useful for device scaling. In this work a novel parameter extraction technique that permits delay times associated with the physical operation of the transistor, along with element values for an equivalent circuit, to be determined from terminal S-parameter measurements. The technique is employed to investigate the operation of mm-wave AlInAs/GalnAs/InP heterojunction bipolar transistors. High current phenomena, such as the onset of the Kirk Effect, are clearly evident. The results indicate that the base region delay is dominant in determining the high frequency operation of these devices.

Citation Download Citation

Robert J. Trew and Umesh K. Mishra "Device-scaling constraints based upon delay-time arguments", Proc. SPIE 1288, High-Speed Electronics and Device Scaling, (1 August 1990); https://doi.org/10.1117/12.20905

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