Paper
24 August 2001 Integration of ultrathin resist processes into MPU IC manufacturing flows
Jonathan L. Cobb, Will Conley, Todd Guenther, Fred Huang, Jen-Jiang Lee, Tom Lii, S. Dakshina-Murthy, Colita Parker, Saifi Usmani, Wei Wu, Scott Daniel Hector
Author Affiliations +
Abstract
Extreme ultraviolet lithography (EUVL), and possibly 157-nm lithography, will require thin imaging layers (< 1500 Angstroms). The leading EUV resist strategy utilizes thin resists based on materials designed for 248 nm wavelength exposure and hardmasks. This process has produced lines and spaces with reasonable linearity, resolution, photospeed, and line-edge roughness. Although previous work has approached these limits, integration of sub-150nm resists and hardmasks into current IC manufacturing process flows with acceptable defect control has not yet been demonstrated. The authors are investigating ultrathin resist processing for the gate and back end levels and have collected data on coating properties, defect density, etch selectivity, exposure latitude, and depth of focus. Key results include the demonstration of etching 1500 Angstroms of poly-Si with a 1200 Angstroms thick photoresist etch mask and the demonstration of via chain yield that is comparable to standard thickness resist processes.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jonathan L. Cobb, Will Conley, Todd Guenther, Fred Huang, Jen-Jiang Lee, Tom Lii, S. Dakshina-Murthy, Colita Parker, Saifi Usmani, Wei Wu, and Scott Daniel Hector "Integration of ultrathin resist processes into MPU IC manufacturing flows", Proc. SPIE 4345, Advances in Resist Technology and Processing XVIII, (24 August 2001); https://doi.org/10.1117/12.436856
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Cited by 2 scholarly publications.
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KEYWORDS
Etching

Coating

Photoresist processing

Extreme ultraviolet lithography

Optical lithography

Semiconducting wafers

Cadmium

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