Design, simulation, and fabrication of a novel integrated microaccelerometer utilizing a post-CMOS fabrication technique

In-Hyouk Song; Sunitha Kopparthi; Pratul K. Ajmera; Ashok Srivastava

doi:10.1117/12.483580

22 July 2003 Design, simulation, and fabrication of a novel integrated microaccelerometer utilizing a post-CMOS fabrication technique

In-Hyouk Song, Sunitha Kopparthi, Pratul K. Ajmera, Ashok Srivastava

Author Affiliations +

Proceedings Volume 5055, Smart Structures and Materials 2003: Smart Electronics, MEMS, BioMEMS, and Nanotechnology; (2003) https://doi.org/10.1117/12.483580
Event: Smart Structures and Materials, 2003, San Diego, California, United States

Abstract

Design, simulation, and fabrication of an integrated microaccelerometer, which is one of several applications of a novel device called Laterally Movable Gate FET (LMGFET) are presented. A LIGA-like post-IC fabrication method compatible with monolithic integration of electronic circuits in standard CMOS technology is utilized to fabricate the accelerometers. External acceleration results in motion of LMGFET differential gates, which cause the drain currents in the FETs to change linearly with position and hence motion. Two types of designs are utilized as restraining springs, which are rigidly anchored to the substrate. The gate motion is first simulated by FEM to analyze its mechanical response. The simulation predicts resonance frequencies of the structures to be 6.32 kHz and 4.66 kHz and gate mechanical motion sensitivity values of 6.23 and 11.47 nm/unit acceleration in g. The op-amp is designed, simulated using PSPICE and fabricated using a 1.5 μm standard CMOS process to amplify the sensor output signal. The simulated values for sensitivity of the two accelerometers are 0.23 mV/g and 0.42 mV/g for the folded beam and the serpentine structure, respectively for an amplifier gain of 45.4 (33.14 dB). The LMGFET microaccelerometers show promise for extremely high dynamic linear operating range.

Citation Download Citation

In-Hyouk Song, Sunitha Kopparthi, Pratul K. Ajmera, and Ashok Srivastava "Design, simulation, and fabrication of a novel integrated microaccelerometer utilizing a post-CMOS fabrication technique", Proc. SPIE 5055, Smart Structures and Materials 2003: Smart Electronics, MEMS, BioMEMS, and Nanotechnology, (22 July 2003); https://doi.org/10.1117/12.483580

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