Paper
1 April 2010 The impact of total measurement uncertainty (TMU) on overlay error correction
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Abstract
The motivation of this work is to suggest a guide-line to define a practical overlay metrology requirement for a given design rule. Total measurement uncertainty, TMU, of an overlay metrology is defined as the square root of square sum of following items: tool induced shift (TIS)-mean, TIS-3 sigma, dynamic precision, and tool-to-tool match. It is important to remind that the TMU depends on process conditions, thus TMU is different layer by layer. In this study, the impact of TMU on overlay error correction, which includes process and measurement noise, is investigated in terms of the stability of high order overlay correction parameters. By defining the variation range of correctable parameters as a figure of merit, corresponding TMU is determined for a given design rule. By implementing this methodology, 2 nm of TMU value is obtained for 45 nm of DRAM half pitch, based upon simulation results. Similarly, 1.0 nm of TMU requirement is suggested for 36 nm of DRAM half pitch. Detailed methodology and simulation results are discussed.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jangho Shin, Jeongho Yeo, Young-Seog Kang, and Woosung Han "The impact of total measurement uncertainty (TMU) on overlay error correction", Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 76382F (1 April 2010); https://doi.org/10.1117/12.845823
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KEYWORDS
Overlay metrology

Semiconducting wafers

Data modeling

Optical lithography

Semiconductors

Inspection

Lithography

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