Design-specific variation in pattern transfer by via/contact etch process: full-chip analysis

Valeriy Sukharev; Ara Markosian; Armen Kteyan; Levon Manukyan; Nikolay Khachatryan; Jun-Ho Choy; Hasmik Lazaryan; Henrik Hovsepyan; Seiji Onoue; Takuo Kikuchi; Tetsuya Kamigaki

doi:10.1117/1.3268422

1 October 2009 Design-specific variation in pattern transfer by via/contact etch process: full-chip analysis

Valeriy Sukharev, Ara Markosian, Armen Kteyan, Levon Manukyan, Nikolay Khachatryan, Jun-Ho Choy, Hasmik Lazaryan, Henrik Hovsepyan, Seiji Onoue, Takuo Kikuchi, Tetsuya Kamigaki

Author Affiliations +

Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol. 8, Issue 4, 043007 (October 2009). https://doi.org/10.1117/1.3268422

Abstract

A novel model-based algorithm provides a capability to control full-chip design-specific variation in pattern transfer caused by via/contact etch (VCE) processes. This physics-based algorithm is capable of detecting and reporting etch hot spots based on the fabrication-defined thresholds of acceptable variations in critical dimension (CD) of etched shapes. It can be used also as a tool for etch process optimization to capture the impact of a variety of patterns presented in a particular design. A realistic set of process parameters employed by the developed model allows using this novel VCE electronic design automation tool for design-aware process optimization in addition to the "standard" process-aware design optimization.

©(2009) Society of Photo-Optical Instrumentation Engineers (SPIE)

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Valeriy Sukharev, Ara Markosian, Armen Kteyan, Levon Manukyan, Nikolay Khachatryan, Jun-Ho Choy, Hasmik Lazaryan, Henrik Hovsepyan, Seiji Onoue, Takuo Kikuchi, and Tetsuya Kamigaki "Design-specific variation in pattern transfer by via/contact etch process: full-chip analysis," Journal of Micro/Nanolithography, MEMS, and MOEMS 8(4), 043007 (1 October 2009). https://doi.org/10.1117/1.3268422

Published: 1 October 2009

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