A fluidic cavity vertical-cavity surface-emitting laser (VCSEL) is presented for the detection of biological agents via introducing the analytic biofluid into the high finesse laser cavity. The optical properties of the fluid as modified by the biological cells they contain are sensed by monitoring the output optical intensity and wavelength of the laser. As a preliminary study, our first generation electrically pumped GaAs/AlGaAs based fluidic cavity VCSEL is described, with emphasis on the system design and techniques for the system construction. The device shows a strong spontaneous emission and a considerable wavelength shift when DI water is capillarily fed into the fluidic cavity.
This paper presents a novel ATM router based on free space optical interconnects. The system consists of a VCSEL/CMOS chip that broadcasts N light beams (channels) which are divided into to M sections. A diffractive optic element then expands the number of these beams into N2/M beams which are incident on a smart photodetector array. This array performs an optical to electronic conversion and selects one of the 'input' channels and routes it to the proper output.
After successfully bonding VCSEL arrays to GaAs dummy chips and CMOS chips with three different bonding techniques, the thermal resistance and crosstalk of the bonded VCSEL arrays were measured. The thermal resistance of the VCSELs bonded to a GaAs substrate was found to be as low as 1100 K/W, indicating a high quality contact. Less than 100 K/W thermal crosstalk was also observed in the VCSEL arrays with a pitch of 250 micrometers . The thermal resistance of the VCSEL bonded to a CMOS chip with a standard bonding pad design has also been measured, which is 2490 K/W. The high thermal resistance is due to the dielectric layers underneath the bonding pads.
The fabrication technologies and bonding characteristics of three VCSEL bonding techniques are compared in order to determine the more reliable and robust.
A 2D VCSEL/CMOS array and a GaAs smart detector array are used in the design and implementation of a high performance optoelectronic ATM switch based on 3-stage cross-point switching architecture.
We presented here the design and initial demonstration of three optoelectronic database filters. Each of these systems is intended to serve as an interface between a page oriented optical storage devices and an electronic host computer. In addition to providing optical/electrical data conversion, each filter is capable of reducing the high data rate optical input to low data rate electronic signals compatible with conventional database management systems. For each filter, the system objectives and associated design trade offs are presented. Finally, an overall trend towards increasing pixel logic complexity while reducing optical system complexity is discussed.
This paper presents the construction of the smart pixel arrays which perform AND and XOR functions with three-input and one-output optical signals for the application of an optical database filter. The device is based on oxide confined VCSELs bump bonded to GaAs MESFET pixels. The MSM photodetectors are monolithically integrated with MESFETs.
We have demonstrated an optoelectronic look-up table architecture using vertical-cavity surface-emitting laser- based logic. The system was implemented on a slotted plate understructure. An heterostructure photo-transistor-based optoelectronic XOR gate array was used to perform the necessary logic operations. The system's performance was satisfactory and based on the results we present here, we propose the design of a more compact version.
Integration of vertical cavity surface emitting lasers (VCSELs) onto a prefabricated smart pixel chip introduces fabrication problems since they can not be grown on foundry fabricated Si CMOS or GaAs MESFET circuit. This paper presents an approach to flip-chip bump-bonding VCSEL-arrays to a pixel chip in which each VCSEL is bonding directly to the appropriate pixel circuit. Thus, no added area is required and the interconnect capacitance is held to a minimum. The technique requires contacting both the n- and p-mirror of the VCSEL on the same side of the VCSEL chip and in the same plane. This allows bump bonding both contacts to the pixel chip and subsequent removal of the VCSEL chip substrate. The steps required to accomplish the VCSEL coplanar bonding include reactive ion etching of mesas and device separation in BCL3/Cl, electroplating a 4.5 micrometers high gold coplanar contact post, In/Sn alloy solder deposition, bonding to the smart pixel chip, and accurate alignment of the VCSEL and pixel chips, epoxy underfill and at last substrate removal.
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