Fully depleted silicon on insulator (FDSOI) circuits provides unique advantages of being of low power, or high performance, or a combination of both if properly deployed. The tradeoff is that designers need to take steps to ensure interference between circuit blocks of different voltage domains, and antenna damages do not occur. This paper describes an efficient design, which combines guard rings and antenna diodes into one, to resolve these potential issues.
KEYWORDS: Transistors, Reliability, System on a chip, Semiconductors, Temperature metrology, Capacitance, Metals, Optical proximity correction, Oxides, Copper
To date, majority of the papers presented in the conference focused on how to print smaller transistors that run faster. In a different market such as safety-focused automotive market, “smaller and faster” are replaced by “tougher and living longer”. In such a market, a chip has to endure a wide range of operating temperature from -40C to 150C, and is required to have an extremely low field failure rate over 10+ years. There is a wide range of design techniques that can be deployed to improve the quality of a chip. In this paper, we present some of these design techniques that are related to the physical aspects of standard cells.
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