Comprehensive through-silicon-via (TSV) characterization, including grind side measurements, is critical to ensure device reliability in chiplet technology. Here we report on TSV metrology using spectral interferometry (SI), which is used to acquire absolute phase information of polarized and broad-band light interacting with a sample. This phase information can be translated into the optical path length of the partial beams traveling within the structure. We utilize the spatial separation of peaks related to light reflected from the top surface and the surface of interest to directly measure the TSV depth after reactive ion etching as well as the reveal height on the grind side, without modeling and even in the presence of multilayers or surrounding patterning. Polarization-dependent SI measurements enable the quantification of asymmetry at the bottom of the TSVs not visible in top-down CD measurements. SI is robust and fast and unveils novel information in TSV metrology not accessible with established in-line metrology techniques.
We have demonstrated the unique capabilities of spectral interferometry (SI) with vertical traveling scatterometry algorithms (VTS) to solve 3D NAND challenges by measuring complex layer thicknesses of the multideck 3D structures directly from the VTS signals, without modeling, with Cell Over Periphery (COP) underlayer filtering. Multiple examples are presented in the paper, including the measurement of the thin and thick layers of memory structures above the complex logic arrays and the remaining thickness of the fully processed Si wafer from the back side after thinning. In addition, VTS and AI enable direct profiling of the deep through-type cell metal contacts in the areas with nonperiodic staircases and significant lateral variations under the measurement spot.
A spectral interferometry technique called vertical travelling scatterometry (VTS) is introduced, demonstrated, and discussed. VTS utilizes unique information from spectral interferometry and enables solutions for applications that are infeasible with traditional scatterometry approaches. The technique allows for data filtering related to spectral information from buried layers, which can then be ignored in the optical model. Therefore, using VTS, selective analyses of the topmost part of an arbitrarily complex stack are possible within a single metrology step. This methodology helps to overcome geometrical complexities and allows for focusing on parameters of interest through dramatically simplified optical modeling. Such model simplifications are specifically desired for back-end-of-line applications. Three examples are monitored discussed: (i) the critical dimensions (CDs) of a first metal level on top of nanosheet gate-all-around transistor structures, (ii) the thickness of an interlayer dielectric above embedded memory in the active area, and (iii) the CDs of trenches on top of tall stacks in the micrometer range comprising many layered dielectrics. It was found that, in all three cases, data filtering through VTS allowed for a simple optical model capable of delivering parameters of interest. The validity and accuracy of the VTS solution results were confirmed by extensive reference metrology obtained by traditional scatterometry, scanning electron microscopy, and transmission electron microscopy. Furthermore, it was shown that machine learning models trained with VTS filtered data can converge to a robust solution with a smaller dataset compared with models training with traditional scatterometry data.
KEYWORDS: Metrology, Semiconducting wafers, Scatterometry, Optical filters, Dielectrics, Data modeling, Back end of line, Front end of line, Chemical mechanical planarization, Transmission electron microscopy
In this work, a novel spectral interferometry technique called vertical travelling scatterometry (VTS) is introduced, demonstrated, and discussed. VTS utilizes unique information from spectral interferometry and enables solutions for applications that are infeasible with traditional scatterometry approaches. The technique allows for data filtering related to spectral information from buried layers, which can then be ignored in the optical model. Therefore, using VTS, selective measurements of the topmost part of an arbitrarily complex stack are possible within a single metrology step. This methodology helps to overcome geometrical complexities and allows focusing on parameters of interest through dramatically simplified optical modelling. Such model simplifications are specifically desired for back-end-of-line applications. Three examples are discussed in this paper: monitoring (i) critical dimensions of a first metal level on top of nanosheet gate-all-around transistor structures, (ii) the thickness of an interlayer dielectric above embedded memory in the active area, and (iii) critical dimensions of trenches on top of tall stacks in the micrometer range comprising many layered dielectrics. It was found that, in all three cases, data filtering through VTS allowed for a simple optical model capable of delivering parameters of interest. The validity and accuracy of the VTS solution results were confirmed by extensive reference metrology obtained by traditional scatterometry, scanning electron microscopy, and transmission electron microscopy.
In-line Raman spectroscopy for compositional and strain metrology throughout front-end-of-line (FEOL) manufacturing of next-generation gate-all-around nanosheet field-effect transistors is presented. Thin and alternating layers of fully strained pseudomorphic Si(1 − x)Gex and Si were grown epitaxially on a Si substrate and subsequently patterned. Intentional strain variations were introduced by changing the Ge content (x = 0.25, 0.35, 0.50). Polarization-dependent in-line Raman spectroscopy was employed to characterize and quantify the strain evolution of Si and Si(1 − x)Gex nanosheets throughout FEOL processing by focusing on the analysis of Si-Si and Si-Ge optical phonon modes. To evaluate the accuracy of the Raman metrology results, strain reference data were acquired by non-destructive high-resolution x-ray diffraction and from destructive lattice deformation maps using precession electron diffraction. It was found that the germanium-alloy composition as well as Si and Si(1 − x)Gex strain obtained by Raman spectroscopy are in very good agreement with reference metrology and follow trends of previously published simulations.
In-line Raman spectroscopy for compositional and strain metrology throughout front-end-of-line manufacturing of next generation stacked gate-all-around nanosheet field-effect transistors is presented. Thin and alternating layers of fully strained pseudomorphic Si(1-x)Gex and Si were grown epitaxially on a Si substrate and subsequently patterned. Intentional strain variations were introduced by changing the Ge content (x = 0.25, 0,35, 0.50). Polarization-dependent in-line Raman spectroscopy was employed to characterize and quantify the strain evolution of Si and Si(1-x)Gex nanosheets throughout front-end-of-line processing by focusing on the analysis of Si-Si and Si-Ge optical phonon modes. To evaluate the accuracy of the Raman metrology results, strain reference data were acquired by non-destructive high-resolution x-ray diffraction and from destructive lattice deformation maps using precession electron diffraction. It was found that the germanium-alloy composition as well as Si and Si(1-x)Gex strain obtained by Raman spectroscopy are in excellent agreement with reference metrology and follow trends of previously published simulations.
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