As devices continue to increase in density and complexity, ever more stringent specifications are placed on the wafer
scale equipment manufacturers to produce higher quality and higher output. This results in greater investment and more
resource being diverted into producing tools and processes which can meet the latest demanding criteria. Substrate
materials employed in the fabrication process range from Silicon through InP and include GaAs, InSb and other optical
networking or waveguide materials. With this diversity of substrate materials presented, controlling the geometries and
surfaces grows progressively more challenging. This article highlights the key parameters which require close
monitoring and control in order to produce highly precise wafers as part of the fabrication process. Several as cut and
commercially available standard polished wafer materials were used in empirical trials to test tooling options in
generating high levels of geometric control over the dimensions while producing high quality surface finishes. Specific
attention was given to the measurement and control of: flatness; parallelism/TTV; surface roughness and final target
thickness as common specifications required by the industry. By combining the process variables of: plate speed,
download pressure, slurry flow rate and concentration, pad type and wafer travel path across the polish pad, the effect of
altering these variables was recorded and analysed to realize the optimum process conditions for the materials under test.
The results being then used to design improved methods and tooling for the thinning and polishing of photonic materials
applied to MOEMS-MEMS device fabrication.
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