Mr. Koji Ishibashi Profile

Koji Ishibashi

SPIE Involvement:

Author

Publications (1)

Proceedings Article | 22 February 2021 Presentation + Paper

Addressing NIL integration for semiconductor device manufacturing

Sentaro Aihara, Noburu Takakura, Fuma Kizu, Satoru Jimbo, Koji Ishibashi, Junichi Seki, Yuichiro Oguchi, Toshiya Asano, Yoichi Matsuoka, Masahiro Tamura, Osamu Morimoto

Proceedings Volume 11610, 1161007 (2021) https://doi.org/10.1117/12.2584720

KEYWORDS: Nanoimprint lithography, Manufacturing, Computational lithography, Semiconductors, Semiconductor manufacturing, Optical lithography, Semiconducting wafers, Photomasks, Ultraviolet radiation, Physics

Read Abstract +

Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. All lithographic approaches must establish an ecosystem in order to meet the stringent demands for device manufacturing. The table below shows the performance requirements for each category. Throughput is a basic requirement for cost of ownership. Defectivity addresses device yield. Overlay is also needed to enhance device yield. Each device generation places stricter demands on the overlay budget. An infrastructure is required in order to successfully yield advanced devices. In addition, today’s solutions require computational methods and machine learning to meet the requirements described above. The purpose of this paper is to describe the NIL integration requirements, review some of the key solutions for total integration.

View contact details

UPDATE YOUR PROFILE

Is this your profile? Update it now.

Sign into your SPIE.org account

Don’t have a profile and want one?

Create an account on SPIE.org

Keywords/Phrases

Search In:

Publication Years