Mr. Toshiya Asano Profile

Toshiya Asano

at Canon Inc

SPIE Involvement:

Author

Publications (9)

Proceedings Article | 30 April 2023 Presentation

Refinements of a nanoimprint process simulator

Shingo Ishida, Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Shintaro Narioka, Yoshihiro Shiode, Sentaro Aihara, Toshiya Asano

Proceedings Volume 12495, 124950N (2023) https://doi.org/10.1117/12.2657058

KEYWORDS: Nanoimprint lithography, Optical lithography, Ultraviolet radiation, Physics, Performance modeling, Nanotechnology, Manufacturing equipment, Manufacturing, Lithography, Device simulation

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SPIE Journal Paper | 4 January 2022

Enabling nanoimprint simulator for quality verification: process-design co-optimization toward high-volume manufacturing

Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Shintaro Narioka, Takahiro Nakayama, Yoshihiro Shiode, Sentaro Aihara, Toshiya Asano

JM3, Vol. 21, Issue 01, 011005, (January 2022) https://doi.org/10.1117/12.10.1117/1.JMM.21.1.011005

KEYWORDS: Nanoimprint lithography, Photoresist processing, Computer simulations, Distortion, Manufacturing, Head, Solids, Optical lithography, High volume manufacturing, Resistance

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Proceedings Article | 22 February 2021 Presentation + Paper

Addressing NIL integration for semiconductor device manufacturing

Sentaro Aihara, Noburu Takakura, Fuma Kizu, Satoru Jimbo, Koji Ishibashi, Junichi Seki, Yuichiro Oguchi, Toshiya Asano, Yoichi Matsuoka, Masahiro Tamura, Osamu Morimoto

Proceedings Volume 11610, 1161007 (2021) https://doi.org/10.1117/12.2584720

KEYWORDS: Nanoimprint lithography, Manufacturing, Computational lithography, Semiconductors, Semiconductor manufacturing, Optical lithography, Semiconducting wafers, Photomasks, Ultraviolet radiation, Physics

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Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. All lithographic approaches must establish an ecosystem in order to meet the stringent demands for device manufacturing. The table below shows the performance requirements for each category. Throughput is a basic requirement for cost of ownership. Defectivity addresses device yield. Overlay is also needed to enhance device yield. Each device generation places stricter demands on the overlay budget. An infrastructure is required in order to successfully yield advanced devices. In addition, today’s solutions require computational methods and machine learning to meet the requirements described above. The purpose of this paper is to describe the NIL integration requirements, review some of the key solutions for total integration.

Proceedings Article | 21 September 2020 Presentation

Computational lithography and its role in nanoimprint lithography for semiconductor device manufacturing

Toshiya Asano, Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Hiromi Hiura, Keita Sakai, Mitsuru Hiura, Osamu Morimoto, Yukio Takabayashi, Takehiko Iwanaga

Proceedings Volume 11518, 115180V (2020) https://doi.org/10.1117/12.2574629

KEYWORDS: Nanoimprint lithography, Photomasks, Manufacturing, Optical lithography, Stochastic processes, Computational lithography, Semiconductor manufacturing, Semiconductors, Photoresist processing, Ultraviolet radiation

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Proceedings Article | 23 March 2020 Paper

Nanoimprint system alignment and overlay improvement for high volume semiconductor manufacturing

Atsushi Kimura, Yukio Takabayashi, Takehiko Iwanaga, Mitsuru Hiura, Keita Sakai, Hiroshi Morohoshi, Toshiya Asano, Tatsuya Hayashi, Takamitsu Komaki

Proceedings Volume 11324, 113240B (2020) https://doi.org/10.1117/12.2551985

KEYWORDS: Nanoimprint lithography, Semiconducting wafers, Optical alignment, Photomasks, Distortion, Overlay metrology, Optical lithography, Wafer testing, Lithography, Semiconductor manufacturing

Read Abstract +

Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. Any new lithographic technology to be introduced into manufacturing must deliver either a performance advantage or a cost advantage. Key technical attributes include alignment, overlay and throughput. In previous papers, overlay and throughput results have been reported on test wafers. In this work, improvements to the alignment system, together with the High Order Distortion Correction (HODC) system have enabled better distortion and overlay results. On test wafers, XMMO of 3.2nm and 2.8nm in x and y respectively was demonstrated. There is also an opportunity to further improve results by applying wafer chucks with better flatness specifications. Further advances have also been made through the application of a multi-wavelength alignment strategy. Finally, we discuss how computational methods can enhance NIL productivity and reduce the number of learning cycles

Proceedings Article | 23 March 2020 Paper

Enabling nanoimprint simulator for quality verification; process-design co-optimization toward high volume manufacturing

Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Shintaro Narioka, Takahiro Nakayama, Yoshihiro Shiode, Sentaro Aihara, Toshiya Asano

Proceedings Volume 11328, 113280N (2020) https://doi.org/10.1117/12.2551999

KEYWORDS: Nanoimprint lithography, Computer simulations, Photoresist processing, Manufacturing, Distortion, High volume manufacturing, Solids, Overlay metrology, Fluid dynamics

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Proceedings Article | 27 June 2019 Paper

The advantages of nanoimprint lithography for semiconductor device manufacturing

Toshiya Asano, Keita Sakai, Kiyohito Yamamoto, Hiromi Hiura, Takahiro Nakayama, Tomohiko Hayashi, Yukio Takabayashi, Takehiko Iwanaga, Douglas Resnick

Proceedings Volume 11178, 111780I (2019) https://doi.org/10.1117/12.2532522

KEYWORDS: Photomasks, Nanoimprint lithography, Semiconducting wafers, Lithography, Optical lithography, Manufacturing, Semiconductors, Line width roughness, Particles, Semiconductor manufacturing

Read Abstract +

Imprint lithography is an effective and well known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. Any new technology to be introduced into manufacturing must deliver either a performance advantage or a cost advantage. Given the risks associated with this introduction, generally a combination of both performance and cost advantage is preferred. In this paper both performance attributes and cost are discussed. NIL resolution and linewidth roughness do not have the limitations of conventional projection lithographic method. Furthermore, it is not subject to patterning restrictions that forced the industry towards one dimensional patterning. A cost example case of 20nm dense contacts is also presented. Because NIL utilized a single step patterning approach, process costs are substantially reduced relative to ArF immersion lithography. Overall, NIL currently realizes a 28% cost advantage for this case, but as mask life continues to improve, the cost advantages become much more significant.

Proceedings Article | 26 March 2019 Paper

The advantages of nanoimprint lithography for semiconductor device manufacturing

Keita Sakai, Kiyohito Yamamoto, Hiromi Hiura, Takahiro Nakayama, Toshiya Asano, Tomohiko Hayashi, Yukio Takabayashi, Takehiko Iwanaga, Douglas Resnick

Proceedings Volume 10958, 109580G (2019) https://doi.org/10.1117/12.2514925

KEYWORDS: Photomasks, Nanoimprint lithography, Semiconducting wafers, Lithography, Optical lithography, Manufacturing, Semiconductors, Line width roughness, Particles, Semiconductor manufacturing

Read Abstract +

Imprint lithography is an effective and well known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of widediameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. Any new technology to be introduced into manufacturing must deliver either a performance advantage or a cost advantage. Given the risks associated with this introduction, generally a combination of both performance and cost advantage is preferred. In this paper both performance attributes and cost are discussed. NIL resolution and linewidth roughness do not have the limitations of conventional projection lithographic method. Furthermore, it is not subject to patterning restrictions that forced the industry towards one dimensional patterning. A cost example case of 20nm dense contacts is also presented. Because NIL utilized a single step patterning approach, process costs are substantially reduced relative to ArF immersion lithography. Overall, NIL currently realizes a 28% cost advantage for this case, but as mask life continues to improve, the cost advantages become much more significant.

Proceedings Article | 3 October 2018 Paper

High volume semiconductor manufacturing using nanoimprint lithography

Zenichi Hamaya, Junichi Seki, Toshiya Asano, Keita Sakai, Ali Aghili, Makoto Mizuno, Jin Choi, Chris Jones

Proceedings Volume 10810, 108100F (2018) https://doi.org/10.1117/12.2501008

KEYWORDS: Photomasks, Particles, Semiconducting wafers, Nanoimprint lithography, Mask cleaning, Polishing, Overlay metrology, Control systems, Surface finishing, Optical lithography

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