This paper presents a model of high frequency capacitance of a SOI MOSCAP. The capacitance in strong inversion is described with minority carrier redistribution in the inversion layer taken into account. The efficiency of the computational process is significantly improved. Moreover, it is suitable for the simulation of thin-film SOI structures. It may also be applied to the characterization of non-standard SOI MOSCAPS e.g. with nanocrystalline body.
Reverse current of GaN vertical Schottky diodes is simulated using Silvaco ATLAS to optimize the geometry for the best performance. Several physical quantities and phenomena, such as carrier mobility and tunneling mechanism are studied to select the most realistic models. Breakdown voltage is qualitatively estimated based on the maximum electric field in the structure.
In this work split-gate charge trap FLASH memory with a storage layer containing 3D nano-crystals is proposed and
compared with existing sub-90 nm solutions. We estimate electrical properties, cell operations and reliability issues.
Analytical predictions show that for nano-crystals with the diameter < 3 nm metals could be the preferred material. The
presented 3D layers were fabricated in a CMOS compatible process. We also show what kinds of nano-crystal
geometries and distributions could be achieved. The study shows that the proposed memory cells have very good
program/erase/read characteristics approaching those of SONOS cells but better retention time than standard discrete
charge storage cells. Also dense nano-crystal structure should allow 2-bits of information to be stored.
Drain current and transconductance of a symmetrical, undoped double-gate MOSFET is modeled for the first time with
mobility depending on both the applied voltage and position in the channel leading to analytical formulae. The obtained
models are compared with simplified formulae assuming position-independent effective mobility. Good agreement is
obtained in the case of one of the selected mobility models.
The channel mobility and reliability of NMOSFETs with GaN channel are investigated by means of split CV and
constant-voltage-stress techniques. The influence of stress polarity and duration on current in the off-state, threshold
voltage and subthreshold slope is studied.
The influence of the method of series resistance determination on the extracted channel mobility is investigated in MOS
transistors with relaxed and strained Ge channel. The dependence of the extracted mobility on the channel length and the
frequency of the signal used to measure capacitance-voltage characteristics are examined.
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