Mr. Mark E. Yelverton Profile

Mark E. Yelverton

Engineer at GLOBALFOUNDRIES Inc

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Author

Publications (6)

Proceedings Article | 2 April 2014 Paper

Lithography focus/exposure control and corrections to improve CDU at post etch step

Young Ki Kim, Mark Yelverton, John Tristan, Joungchel Lee, Karsten Gutjahr, Ching-Hsiang Hsu, Hong Wei, Lester Wang, Chen Li, Lokesh Subramany, Woong Jae Chung, Jeong Soo Kim, Vidya Ramanathan, LipKong Yap, Jie Gao, Ram Karur-Shanmugam, Anna Golotsvan, Pedro Herrera, Kevin Huang, Bill Pierson

Proceedings Volume 9050, 90501Y (2014) https://doi.org/10.1117/12.2045433

KEYWORDS: Semiconducting wafers, Etching, Lithography, Finite element methods, Scatterometry, Critical dimension metrology, Factory automation, Scanners, High volume manufacturing, Scatter measurement

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Proceedings Article | 2 April 2014 Paper

Integrated production overlay field-by-field control for leading edge technology nodes

Woong Jae Chung, John Tristan, Karsten Gutjahr, Lokesh Subramany, Chen Li, Yulei Sun, Mark Yelverton, Young Ki Kim, Jeong Soo Kim, Chin-Chou Kevin Huang, William Pierson, Ramkumar Karur-Shanmugam, Brent Riggs, Sven Jug, John Robinson, Lipkong Yap, Vidya Ramanathan

Proceedings Volume 9050, 90501P (2014) https://doi.org/10.1117/12.2046076

KEYWORDS: Scanners, Semiconducting wafers, Overlay metrology, Control systems, Statistical modeling, Error analysis, Data modeling, Optical lithography, Process control, Atomic force microscopy

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Proceedings Article | 2 April 2014 Paper

Lithography run-to-run control in high mix manufacturing environment with a dynamic state estimation approach

Mark Yelverton, Gaurav Agrawal

Proceedings Volume 9050, 90500Q (2014) https://doi.org/10.1117/12.2046331

KEYWORDS: Lithography, Control systems, Semiconducting wafers, Metrology, Process control, Manufacturing, Databases, Algorithm development, Statistical analysis, Semiconductor manufacturing

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Proceedings Article | 18 April 2013 Paper

High order wafer alignment for 20nm node logic process

Bumhwan Jeon, Shyam Pal, Sohan Mehta, Subramany Lokesh, Yun Tao Jiang, Chen Li, Mark Yelverton, Yayi Wei

Proceedings Volume 8681, 868110 (2013) https://doi.org/10.1117/12.2010709

KEYWORDS: Semiconducting wafers, Optical alignment, Distortion, Overlay metrology, Annealing, Transistors, Logic, Laser processing, Lithography, Semiconductor manufacturing

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Proceedings Article | 10 April 2013 Paper

Lithography focus/exposure control and corrections to improve CDU

Young Ki Kim, Mark Yelverton, Joungchel Lee, Jerry Cheng, Hong Wei, Jeong Soo Kim, Karsten Gutjahr, Jie Gao, Ram Karur-Shanmugam, Pedro Herrera, Kevin Huang, Roie Volkovich, Bill Pierson

Proceedings Volume 8681, 86811P (2013) https://doi.org/10.1117/12.2011534

KEYWORDS: Semiconducting wafers, Finite element methods, Lithography, Scatterometry, Critical dimension metrology, Scanners, Factory automation, Scatter measurement, Metrology, Process control

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Proceedings Article | 23 August 2000 Paper

Modeling and control of thermocouples for reduced measurement uncertainty in diffusion furnaces

Mark Yelverton, Michael McBride

Proceedings Volume 4182, (2000) https://doi.org/10.1117/12.410063

KEYWORDS: Calibration, Temperature metrology, Data modeling, Diffusion, Manufacturing, Sensors, Electronics, Quartz, Semiconducting wafers, Contamination

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Showing 5 of 6 publications

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