An automated system for detecting systematic defect in memory cell array

Ji-Seong Jeong; Chang-Hun Ko; Seung-Eun Yu; Oh-Hun Kwon; Tae-Hyeong Ku; Tae-Heon Kim; Dong-Won Lim; Bo-Tak Lim; Hyuck-Joon Kwon; Jung-Yun Choi; Hyung-Jong Ko

doi:10.1117/12.2605606

26 May 2022 An automated system for detecting systematic defect in memory cell array

Ji-Seong Jeong, Chang-Hun Ko, Seung-Eun Yu, Oh-Hun Kwon, Tae-Hyeong Ku, Tae-Heon Kim, Dong-Won Lim, Bo-Tak Lim, Hyuck-Joon Kwon, Jung-Yun Choi, Hyung-Jong Ko

Author Affiliations +

Proceedings Volume 12053, Metrology, Inspection, and Process Control XXXVI; 120531N (2022) https://doi.org/10.1117/12.2605606
Event: SPIE Advanced Lithography + Patterning, 2022, San Jose, California, United States

Conference Poster

Abstract

As the technology node shrinks, the systematic defects such as the missing and extra pattern are generated in the process of cell patterning. The defect such as the extra and missing pattern can lead to a critical failure on device. Subsequently, the systematic defect in the UBE could be an etch-gas path on proceeding the etch process and cause the quality degradation of device. In this paper, we propose an automated system to inspect the systematic defect in the cell array with the scanning electron microscope (SEM) image and the physical design. The method consists of conversion, matching, and detection. In the conversion method, the SEM image is converted into the layout using image processing such as noise reduction, segmentation and contour tracing. In the following matching method, gradient descent optimization is used to match the coordinate of layout converted from the SEM image with the coordinate of physical design. In the final detection method, the defect is detected by inspecting the patterns of two layouts. On the test of 2,500 data, we confirmed that the accuracy improved from 97% to 100% as a result of comparing the engineer's visual inspection method with the proposed method. In addition, the turnaround time (TAT) is improved by approximately 40 times. The proposed system is currently applied to DRAM products and used for the field of design for manufacturing (DFM) and manufacturing process.

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Ji-Seong Jeong, Chang-Hun Ko, Seung-Eun Yu, Oh-Hun Kwon, Tae-Hyeong Ku, Tae-Heon Kim, Dong-Won Lim, Bo-Tak Lim, Hyuck-Joon Kwon, Jung-Yun Choi, and Hyung-Jong Ko "An automated system for detecting systematic defect in memory cell array", Proc. SPIE 12053, Metrology, Inspection, and Process Control XXXVI, 120531N (26 May 2022); https://doi.org/10.1117/12.2605606

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