The concurrent saturation in dimensional scaling and increase in manufacturing cost and complexity has caused the overall semiconductor manufacturing cost to significantly increase. As a result, the cost per transistor is predicted to sharply increase in future technologies, deviating from the typical 30% cost per transistor reduction. This work explores the use of 3D-integration technologies, as wafer-to-wafer hybrid bonding, for both mobile and high-performance application. It is observed that the use of 3D-integration schemes, can reduce the overall die cost at same functionality, paving the way for cost-effective scaling solutions in future technologies.
Co-packaged optics for high performance computing or other data center applications requires dense integration of silicon photonic integrated circuits (PICs) with electronic integrated circuits (EICs). This work discusses the impact of three-dimensional (3D) hybrid integration on the thermal performance of Si ring-based photonic devices in wavelength-division multiplexing PICs. A thermal finite element model of the EIC-PIC assembly is developed and calibrated with thermo-optic device measurements, before and after integration of an electrical driver on top of the PIC by means of microbump flip-chip bonding. Both measurements and simulations of the thermal tuning efficiency and crosstalk between silicon photonic devices show that the EIC can have a significant impact on the thermal performance of the integrated heaters in the PIC by acting as an undesired heat spreader. This heat spreading lowers the heater efficiency with 43.3% and increases the thermal crosstalk between the devices by up to 44.4% compared with a PIC-only case. Finally, it is shown that these negative thermal effects of 3D integration can largely be mitigated by a thermally aware design of the microbump array and the back-end-of-line interconnect, guided by the calibrated thermal simulation model.
Silicon photonics is now considered the photonics platform of choice for short-reach data center single mode pluggable transceivers. With the emergence of co-packaged optics concepts, it can also enable high performance computing with power-efficient interconnect, but also Lidar system integration or even optical quantum computing. In this paper we will present an overview of what can be achieved in state-of-the-art silicon photonics platforms and we will discuss some of the emerging technology trends. In particular, we will discuss the integration of LPCVD SiN in an active silicon photonics platform.
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