High-defect density in thermodynamics driven directed self-assembly (DSA) flows has been a major cause of concern for a while and several questions have been raised about the relevance of DSA in high-volume manufacturing. The major questions raised in this regard are: (1) What is the intrinsic level of DSA-induced defects? (2) Can we isolate the DSA-induced defects from the other processes-induced defects? (3) How much do the DSA materials contribute to the final defectivity and can this be controlled? (4) How can we understand the root causes of the DSA-induced defects and their kinetics of annihilation? (5) Can we have block copolymer anneal durations that are compatible with standard CMOS fabrication techniques (in the range of minutes) with low-defect levels? We address these important questions and identify the issues and the level of control needed to achieve a stable DSA defect performance.
Directed Self-Assembly (DSA) is considered as a potential patterning solution for future generation devices. One of the
most critical challenges for translating DSA into high volume manufacturing is to achieve low defect density in the DSA
patterning process. The defect inspection capability is fundamental to defect reduction in any process, particularly the
DSA process, as it provides engineers with information on the numbers and types of defects. While the challenges of
other candidates of new generation lithography are well known (for example, smaller size, noise level due to LER etc.),
the DSA process causes certain defects that are unique. These defects are nearly planar and in a material which produces
very little defect scattering signal. These defects, termed as “dislocation” and “disclination” have unique shapes and have
very little material contrast. While large clusters of these unique defects are easy to detect, single dislocation and
disclination defects offer considerable challenge during inspection. In this investigation, etching the DSA pattern into a
silicon (Si) substrate structure to enhance defect signal and Signal-to-Noise Ratio (SNR) is studied. We used a Rigorous
Coupled-Wave Analysis (RCWA) method for solving Maxwell’s equations to simulate the DSA unique defects and
calculate inspection parameters. Controllable inspection parameters include various illumination and collection
apertures, wavelength band, polarization, noise filtering, focus, pixel size, and signal processing. From the RCWA
simulation, we compared SNR between “Post-SiN etch” and “Post-SiN+Si-substrate etch” steps. The study is also
extended to investigate wafer-level data at post etch inspection. Both the simulations and inspection tool results showed
dramatic signal and SNR improvements when the pattern was etched into the SiN+Si substrate allowing capture of DSA
unique defect types.
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